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| If one had that education, then he knew "foldback current limiting". A concept taught to Freshman EEs. Also explains why he has never once posted any numbers for his P=IV equation. And why he does not know what any design engineer always knows.
Every electronics design must not be damaged by any voltage down to zero. As required by so many international design standards that existed long before PCs existed. One design technique to meet those standards is foldback current limiting. Anyone with any engineering education would have known that.
Anyone can lie about his education. Damning evidence - he does not even know what foldback current limiting is. Which says he has also lied about his education.
All voltages down to zero must not damage any electronics. What do datasheet numbers, that he posted, say? Oh. He never even cited one datasheet. But is somehow a highly educated expert - who will order us what to believe. "Trust me" does not work when one has even lied about his education.
All voltages down to zero must not damage any electronics. As demonstrated by numeric trends even put into that P=IV equation. If he knew what foldback current limiting was, then he knew both V and I diminish when P becomes too large. This is, apparently, the first time he has ever heard of 'foldback current limiting'. That he could learn even from a datasheet for a single chip power supply: 7805. Designed 50 years ago and still used today.
Foldback current limiting was standard even long before that.
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surge protector vs. the refrigerator
